# Build a 4-bit right shift register device using four D-flip-flops and some one bit tri-state…

1. Build a 4-bit right shift register device using four D-flip-flops and some one bit tri-state buffers.
Make sure that you have a LD control over it.
When LD = 0, your register will be able to do parallel loading.
When LD = 1, it will be able to shift right one bit (i.e. SI -> Q3 -> Q2 -> Q1 -> Q0).

Here is some info about the one bit tri-state buffer for your reference:
1).A one bit tri-state buffer can be obtained from the “Simulation Logic.clf” libruary.
2).A testing circuit and its truth table are as follows:

Hand-In

• The underlining circuit of the 4-bit right shift register device. (Circuit with labeled ports)
• The testing circuit of the 4-bit right shift register device, the box with binary switches and binary probes connected to it
2. Design a 4-bit multiplier using your 4-bit parallel adder device and the 4-bit right shift register device above with an additional D-flip-flop.

• The diagram below shows an unsigned integer multiplier.
• Build the circuit in Logicworks using:
• 4 bit data paths
• hex keyboards for setting the initial values of the Multiplicand and Multiplier register Q
• switches for controlling the shifting and the loading of the A register
• switches for controlling the shifting and loading of the Q register
• switches to control the loading and clearing of the C register (the C register can be a D flip-flop)
• hex displays and binary probe to show the results
• show the contents of B*D (i.e. 1011*1101 ) at each stage of the multiplication
• Hand in the following:
• Make a table to show the result and operation at each stage of the multiplication.
• Print out your circuits at the initial stage, the final stage and any two stages in between.

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